Technology and Product Solutions Company, Mantaro Announces the Lowest Latency 10G Ethernet FPGA IP Solution

As reported, Mantaro now offers the lowest latency 10G Ethernet Solution for Altera and Xilinx FPGAs. It is specifically targeted for demanding financial, high-frequency trading and high performance computing applications.

To meet customers’ demands, Mantaro announces the industry’s Lowest Latency 10Gbps Ethernet IP solution in a fully integrated IEEE802.3-2008 (802.3ae) compliant package for Network Interface Card and Ethernet switching applications. The number of applications requiring lower latency 10Gbps Ethernet IP solutions has increased dramatically over the last few years. Mantaro has demonstrated 10Gbps MAC latencies as low as 41.6ns for the transmit path and 76.8ns for the receive path.

The integrated package includes the Lowest Latency 32-bit MAC in the industry in a smaller footprint than existing 64-bit 10Gbps MACs. It also includes flexible 10GBase-R PCS options with XFI interface for direct SFP+/XFP attachment, technology dependent transceiver wrapper for Altera and/or Xilinx FPGAs, statistic counter block (for RMON and MIB), MDIO and I2C cores for external module and optical module status and control and PCIe/UART host control interface. For Linux, a PCIe driver and API are also included. Mantaro offers this package with true sign once licensing options and NO yearly maintenance fees.

The Ethernet IP solution includes a GUI application along with a complete PCIe reference design using an L2 (MAC level) packet generator and checker to facilitate quick integration of the Ethernet IP in a user’s design. The user can also control L1 testing via the GUI by configuring the 10Gbps transceivers to run PRBS (pseudorandom bit sequence patterns) and configure transceiver parameters such as transmit signal levels, transmit pre-emphasis, receiver equalization and receiver gain.

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